The main purpose of the project is to design a scientific calculator using FPGA with VHDL. The Fast Fourier Transform calculation has been developed because this algorithm achieves significant savings in the Discrete Fourier Transform (DFT) computation by exploiting certain symmetries of the Fourier basis functions. The DFT computation requires N*log2N of arithmetic operations. By using Xilinx Fundamental 2.1I simulation tool, a complex digital system can be developed easily and faster compared with the traditional method. The Xilinx FPGA is selected because it can significantly reduce the development cost and easy to implement by using UV EPROM. This project consists of software design and hardware connection. A schematic-based design with VHDL codes was developed to represent the digital algorithm. For the hardware part, there are several devices such as keypad, liquid crystal display (LCD) and Xilinx board (XC4010XLPC84). The complete schematic-based design consist of several schematic block designs such as keypad detection, algorithm processor (FFT) and LCD driver. Results of simulation have proved the system design can achieve the project specification and requirement. For the project’s design, it contributes a large memory which cannot implement by software tool. The number of input/output bonded (IOB) used is 22 out of 65 (33%) which is enough for the design development. But, the number of configuration logic block (CLB) used is 493 out of 400 (exceed 23%). To solve this problem, a large size of FPGA’s memory and more advance of software tool are suggested in the design of scientific calculator.