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Design of a low-noise amplifier for ultra-wideband receiver front-end / Siti Noor Idora Syafinaz Zulkepli

Design of a low-noise amplifier for ultra-wideband receiver front-end_Siti Noor Idora Syafinaz Zulkepli_E3_2014_NI

Abstract Tesis ini membentangkan rekabentuk penguat hingar rendah (LNA) bagi sistem "Ultra- wideband" (UWB) penerima akhir hadapan yang meliputi julat frekuensi daripada 3.1 GHz hingga 7 GHz. Rekabentuk ini dilaksanakan dengan menggunakan 0.18-µ m teknologi pe- lengkap oksida logam semikonduktor (CMOS) kerana ia menyediakan jalur lebar yang lebih tinggi kerana dipengaruhi oleh skala teknologi. Rekabentuk LNA menggunakan tiga seksyen pemasukan penuras bebas jalur dibentangkan untuk mencapai pemadanan pemasukan jalur le- bar. Satu rangkaian T-gegelung dilaksanakan sebagai penuras untuk melanjutkan jalur lebar. Teknik ini juga dimasukkan ke dalam rekabentuk bertujuan untuk pemasukan yang bersesua- ian dan rangkaian keluaran memuncak bagi penguat hingar rendah. Berdasarkan pemerhatian keputusan simulasi, topologi yang dipilih ialah "asymmetric T-coil" berbanding topologi "sym- metric T-coil". Sehubungan itu, dua jenis topologi "T-coil" telah dijalankan dalam rekabentuk LNA untuk tujuan perbandingan. Dengan menggunakan topologi yang dicadangkan, penguat hingar rendah (LNA) bagi sistem "Ultra-wideband" (UWB) dengan lebar jalur daripada 3.1 GHz hingga 7 GHz, memperolehi gandaan sebanyak 12.11 dB daripada 3.19 GHz hingga 3.27 GHz. Bagaimanapun , toleransi gandaan sebanyak sangat tidak memberansangkan di mana se- kitar ±2.8 dB. Gandaan "rolls-off" sebanyak 3 dB sepanjang 6 hingga 7.47 GHz dan minimum hingar rendah sebanyak 3.39 dB tercapai. Jumlah penggunaan kuasa penuh daripada penguat hingar rendah jalur lebar dari bekalan kuasa 1.8 V ialah 1.4 mW. ______________________________________________________________________________________ This thesis presents the Design of a Low-Noise Amplifier (LNA) for Ultra-Wideband (UWB) Receiver Front-end which is covering a frequency range from 3.1 GHz to 7 GHz. This design is implemented using 0.18-µ m Complementary Metal-Oxide-Semiconductor (CMOS) technology as it provides higher bandwidth due to technology scaling. The LNA design em- ploys an input three-section of Chebyshev band-pass filter to achieve wideband input impedance matching. A T-coil network is implemented as a high order filter for bandwidth extension. This technique is also incorporated into the design of the input impedance matching and out- put peaking networks of a low-noise amplifier. Based on observation of simulation result, an asymmetric T-coil topology is chosen rather than symmetry T-coil topology. Thus, two types of T-coil topology are carried out in this LNA design for comparison purposes. By using the proposed topology, a wideband low-noise amplifier with a bandwidth of 3.1 GHz to 7 GHz, a maximum gain of 12.11 dB from 3.19 to 3.27 GHz frequency is achieved. However, the gain flatness is poorer which is around ±2.8 dB. The gain rolls-off by 3 dB from 6 to 7.47 GHz frequency and noise figure of 3.39 dB (min) is achieved. The total power consumption of the wideband low noise amplifier from the 1.8 V power supply is 1.4 mW.

Contributor(s): Siti Noor Idora Syafinaz Zulkepli - Author Primary Item Type: Final Year Project Language: English Subject Keywords: bandwidth; scaling.; topology. First presented to the public: 1/6/2014 Original Publication Date: 12/3/2019 Previously Published By: Universiti Sains Malaysia Place Of Publication: School of Electrical & Electronic Engineering Citation: Extents: Number of Pages - 92 License Grantor / Date Granted:   / ( View License ) Date Deposited 2019-12-04 10:19:14.08 Submitter: Nor Hayati Ismail

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