Analog-to-digital converters play an essential role in modern RF receiver design.
Conventional Nyquist converters require analog components that are precise and highly
immune to noise and interference. In contrast, oversampling converters can be
implemented using simple and high-tolerance analog components. Moreover, sampling
at high frequency eliminates the need for abrupt cutoffs in the analog antialiasing filters.
A technique of noise shaping is used in ΣΔ converters in addition to oversampling to
achieve a high-resolution conversion. A significant advantage of the method is that
analog signals are converted using simple and high-tolerance analog circuits, usually a
1-bit comparator, and analog signal processing circuits having a precision that is usually
much less than the resolution of the overall converter.
In this thesis, design of ΣΔ modulator for WCDMA ADC application will be
described . The Integrator of the modulator is implemented using switch capacitor
circuits. A regenerative latched-type comparator and a D Flip-flop are being used as the
quantizer of the modulator. Two second-order ΣΔ modulator with different topology
have been implemented in Siltera 0.18um CMOS technology . For the both converter,
supply voltage are 1.8 V. The 1st modulator ( Traditional Topology ) has the maximum
signal-to-noise ratio (SNR) measured to be 62 dB, at an input voltage being 0.4 V,
1.74MHz.. For the 2nd modulator ( Full Feedforward Topology ), the maximum SNR is
measured to be 61 dB with an input voltage being 0.4 V, 1.74MHz.
DESIGN OF A 1.8V DELTA-SIGMA MODULATOR FOR ANALOG-TO-DIGITAL CONVERTER IN W-CDMA RECEIVER USING 0.18μm CMOS TECHNOLOGY_Tan Tee Wee_E3_2007_875000065_NI