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Design of a 1.8v analog-to-digital converter (adc) delta-sigma modulator for integrated bluetooth applications using 0.18µm cmos technology / Ng Jiun How

Design of a 1.8v analog-to-digital converter (adc) delta-sigma modulator for integrated bluetooth applications using 0.18µm cmos technology

Abstract Delta-sigma modulator is the most vital part of a converter that does the job of converting analog signal into a noise-shaped low-resolution digital signal. A 17-level, 2nd order ADC delta-sigma modulator with oversampling ratio of 32 when clocked at 32 MHz has been successfully designed and tape-out. The modulator is capable to achieve a worst case peak signal-to-noise-plus-distortion ratio (SNDR) of 70.6 dB and 74.43 dB of dynamic range over a 500 kHz bandwidth. The 1-mm2 modulator is physically implemented with Silterra 0.18 μm mixed-signal CMOS process and consumes only 5.3 mA of current from a 1.8 V supply. Correlated double sampling integrators have been used in this project to suppress the flicker noise in the CMOS implementation. Since the modulator employs a multi-bit architecture, a first-order mismatch noise-shaping encoder is used to shape the noise caused by device mismatches in the circuit.

Contributor(s): Ng, Jiun How - Author Primary Item Type: Final Year Project Identifiers: Accession Number : 875001192 Language: English Subject Keywords: delta-sigma modulator; signal-to-noise-plus-distortion ratio; multi-bit architecture First presented to the public: 3/1/2005 Original Publication Date: 10/3/2017 Previously Published By: Universiti Sains Malaysia Place Of Publication: School of Electrical & Electronic Engineering Citation: Extents: Number of Pages - 137 License Grantor / Date Granted:   / ( View License ) Date Deposited 2017-10-03 17:05:34.935 Date Last Updated 2019-01-07 11:24:32.9118 Submitter: Nor Hayati Ismail

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