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PLL-based Fractional-N frequency synthesizer

PLL-based Fractional-N frequency synthesizer / Ng Ken Hoe
Gelung Terkunci Fasa (PLL) merupakan sejenis sistem kawalan maklum balas yang dipakai untuk mengunci fasa isyarat output kepada fasa isyarat input. Pensintesis frekuensi merupakan salah satu aplikasi PLL. Ia adalah satu sistem kawalan yang digunakan untuk menghasilkan pelbagai frekuensi daripada pengayun tetap tunggal. Biasanya, pensintesis frekuensi memainkan peranan utamanya sebagai penjana pembawa. Ia digunakan untuk penukaran atas dan penukaran bawah untuk operasi transceiver wayarles. Kesusasteraan yang lepas biasanya menganalisi sistem PLL secara linear tetapi situation ini hanya stabil dalam keadaan tertentu. Selain itu, pensintesis integer-n terdapat had kerana pembahaginya mesti dalam angka integer. Dalam projek ini, aplikasi PLL yang merupakan pensintesis pecahan-n akan ditumpukan. Ketaklelurusan sistem ini dating daripada pengesan fasa. Jadi, Lur’e sistem diperlukan untuk membezakan komponent linear dengan komponent nonlinear. Seterusnya, pemilihan penapis gelung adalah penting kerana kestabilan sistem banyak bergantung kepada penapis gelung. Penapis gelung PI telah dibuktikan merupakan penapis terbaik. Reka bentuk litar PLL yang keseluruhan akan diperikasa melalui simulasi Matlab Simulink untuk memastikan kestabilan sistem tersebut. Seterusnya, kajian mengenai langkah untuk meningkatkan pensintesis frekuensi berasaskan PLL perlu dijalankan. Dapatan kajian dapat membantu meningkat prestasi seperti mengurangkan bunyi bising, mengurangkan terlajak dan meningkatkan masa kestabilan. Penalaan akhir dan pemeriksaan diperlukan untuk memastikan fungsi litar yang direka. Selepas process optimum penapis tersebut, signal input boleh tahan sampai maximum sebanyak 17999 Hz. Akhirnya, penapis gelung yang direka dan dioptimumkan serta pembahagi pecahan-N digabungkan dengan sistem PLL untuk menghasilkan simulasi pensintesis frekuensi pecahan-N. Model pensisntesis frekuensi ini merupakan model yang boleh digunakan di industri. Pensintesis frekuensi ini boleh menghasilkan frekuensi yang diingini daripada frekuensi rujukan. _______________________________________________________________________________________________________ Phase-Locked Loop (PLL) is a feedback control system that is employed to lock the phase of the output signal to the input signal. A frequency synthesizer is one of the PLL application. Frequency synthesizer is a control system that is used to generate any of a range of frequencies from a single fixed oscillator. Normally, frequency synthesizer plays its main role as a carrier generator. It is used for up conversion and down conversion operation which is essential for wireless transceiver. In most of the literature, linear analysis was carried out for the PLL system but it is only stable for certain condition. Hence, nonlinear analysis was carried out in this thesis. Besides, integer-N frequency synthesizer has a limitation which its divider must be a real integer value. Thus, in this project, an application of PLL which was fractional-N frequency synthesizer with consideration of nonlinearity will be focused. For frequency synthesizer, the nonlinearity comes from phase detector. A Lur’e system is needed to separate the linear parts and the nonlinear parts in the PLL system. Next, the selection of loop filter is important since the stability of the system mainly depend on loop filter. A PI filter was proved to have the best performances compared to other commonly used filter. Then, the overall PLL system was tested through simulation in Matlab Simulink to check for its stability. Next, a research on how to improve the PLL-based frequency synthesizers was carried out. The finding helped to increase the performance such as reducing the noise, decreasing the overshoot and increasing the stability time. A final tuning and checking were applied to ascertain the functionality of the designed circuit. After the tuning, the system able to support input signal up to 17999 Hz. Finally, the optimized loop filter and fractional-N divider were combined successfully with the PLL system to produce the real simulation of fractional-N frequency synthesizer. This is a real model of frequency synthesizer that can be used in industrial. This frequency synthesizer can synthesis desired frequency from the reference frequency.
Contributor(s):
Ng Ken Hoe - Author
Primary Item Type:
Final Year Project
Identifiers:
Accession Number : 875006029
Language:
English
Subject Keywords:
Phase-Locked Loop (PLL); control system; output signal
First presented to the public:
6/1/2016
Original Publication Date:
5/16/2018
Previously Published By:
Universiti Sains Malaysia
Place Of Publication:
School of Electrical & Electronic Engineering
Citation:
Extents:
Number of Pages - 101
License Grantor / Date Granted:
  / ( View License )
Date Deposited
2018-06-20 14:30:28.022
Date Last Updated
2019-01-07 11:24:32.9118
Submitter:
Mohd Jasnizam Mohd Salleh

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