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A 12-bit pseudo-differential current-source resistor-string hybrid digital-to-analogue converter with low pass rc filter / Afiqah Radin Salamat

A 12-bit pseudo-differential current-source resistor-string hybrid digital-to-analogue converter with low pass rc filter_ Afiqah Binti Radin Salamat_E3_2017_MFAR
Isu utama yang menghadkan prestasi penukar digital ke analog (DAC) adalah kewujudan glic. Di kala teknologi sekarang bergerak ke arah saiz yang lebih kecil, kelajuan yang lebih pantas, ia adalah sangat penting untuk memastikan isu glic di minimalkan. Kerja ini membincangkan cara-cara yang terbaik untuk mengurangkan kewujudan glic di dalam sistem 12-bit pseudo-pengamiran sumber-arus rentetan-perintang hibrid DAC. Glic menghadkan prestasi DAC terutamanya berkenaan dengan kelajuan penukaran digital ke analog. 12-bit DAC yang dinyatakan terdiri daripada kombinasi skim perintang binari berwajaran dan termometer pengekodan terbahagi kepada 8-LSB dan 4-MSB segmen. Untuk projek ini, glic berjaya di kurangkan dengan menambah penapis laluan rendah di bahagian hujung DAC. Kesimpulannya, penapis elekrik laluan rendah ini boleh di manipulasi untuk menapis signal tinggi yang tidak diingani dan hanya membenarkan signal rendah untuk lalu ke DAC. Berdasarkan simulasi didapati tenaga glic adalah 9.1046pVs dan glic amplitud 1.08m V. Ini membuktikan bahawa reka bentuk DAC yang disertakan dengan penapis laluan rendah ini berjaya mengurangkan glic sebanyak 70% dibandingkan dengan reka bentuk DAC asal dan 47.71% pembaikan dibandingkan dengan reka bentuk DAC dengan arus terhad pemandu. Major concern in a high speed digital to analogue converter (DAC) is the occurrence of glitches which limiting the performance of the converter. As technology moving toward higher speed and smaller sizes, eliminating glitches is very important to ensure maximum performance of a DAC. Glitches limit maximum performance of a DAC especially in term of switching speed where it restrict the high speed performance of DAC. In some cases glitches can cause the converter to be unusable. This work discusses the design methodology to further improve glitches in the existing hybrid DAC with current-limited swing reduced driver circuit. The 12 bit hybrid DAC architectures is composed of 8-LSB binary-weighted resistor and 4-MSB thermometer coding in order to have optimize performance. The improved DAC design is accomplished by incorporating a Low Pass RC filter which function to attenuate the amplitude of the glitch that exceed the cutoff frequency, Fc . Simulation results shows that glitch impulse area was 9.1046pVs while peak glitch is only 1.08mV. This results indicates that this design achieves 70% improvement in glitch impulse area reduction compared with original version DAC and showing improvement of 47.71% compared to DAC with only current limited SRD. Overall, this project have successfully achieves lower glitch impulse area.
Contributor(s):
Afiqah, Radin Salamat - Author
Primary Item Type:
Thesis
Language:
English
Subject Keywords:
analogue converter; hybrid; Integral non linearity (INL); Differential non linearity (DNL); Least significant Bit (LSB); Most significant bit (MSB)
Sponsor - Description:
Pusat Pengajian Kejuruteraan Elektrik & Elektronik -
First presented to the public:
1/1/2017
Original Publication Date:
3/9/2018
Previously Published By:
Universiti Sains Malaysia
Place Of Publication:
School of Electrical & Electronic Engineering
Citation:
Extents:
Number of Pages - 138
License Grantor / Date Granted:
  / ( View License )
Date Deposited
2018-03-09 16:57:36.189
Date Last Updated
2019-01-07 11:24:32.9118
Submitter:
Mohd Fadli Abd. Rahman

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A 12-bit pseudo-differential current-source resistor-string hybrid digital-to-analogue converter with low pass rc filter / Afiqah Radin Salamat1 2018-03-09 16:57:36.189