The main purpose of the project is to develop signal coding in RFID reader using FPGA with Verilog. At the baseband of RFID reader, the FPGA performs channelization of the waveform to DAC and from ADC. The baseband processing task in RFID reader would include preamble CRC and checksum, encoding and decoding and so on. This project is focus on the encoding and decoding part in baseband processing. High frequency RFID reader is selected for FPGA implementation. The Air Interface Standard which used for HF-RFID is ISO 18000-3. RFID is using radio frequency to transmit and receive data. There is two direction of data transfer which is data transfer from reader to tag, and data transfer from tag to reader. Different specification of parameter is applied to different data transfer based on the Air Interface Standard ISO 18000-3.For data transfer from reader to tag, data coding shall be implemented using pulse position modulation. One of the two different data coding mode (coding procedure) can be selected which are ‘1 out of 256’ coding or ‘1 out of 4’ coding. For data transfer from tag to reader, data coding shall be implemented using Manchester coding. This project consists of software design and hardware connection. Verilog-based design with Verilog code is developed to represent the encoding and decoding. For the hardware part, UP2 Education Board is chosen for RFID reader signal coding implementation. The Verilog design will be loaded into the FPGA chip to make sure the design is correct and function properly.
Fpga based high frequency rfid reader_Liew Khai Shin_E3_2008_875002453_3068445_NI