The advancement of the RC CMOS in modern era has encouraged the
implementation of the FM receiver in a single Integrated Circuit (IC). As so, the main
objective for this final year project involves in designing a demodulator for FM receiver IC
using 0.18μm CMOS Technology. Cadence Spectre was used to design the Frequency-
Modulation (FM) demodulator. Virtuoso was used to draw the layout of the design. The
project includes four main blocks which are the phase shifter, the quadrature demodulator, a
double cascaded current mirror and the output stage amplifier. First, the phase shifter will
phase shift the output from the Intermediate Frequency (IF) amplifier by 90º. Then the
output of the phase shifter and the IF signal is demodulated to obtain the information
baseband signal using a quadrature demodulator. A double balanced Gilbert Cell Multiplier
configuration is implemented as the quadrature demodulator. Then a double cascaded
current mirror is used to change the differential output into a single ended output. Finally the
output from the current mirror is passed through an output buffer to obtain the output audio
signal with amplitude of 0.5V output swing.
The results obtained for the phase shift network where the signal was phase shifted
90º at the resonant frequency of 10.7MHZ. As for the Gilbert Cell quadrature demodulator,
the output of the demodulated signal is a single frequency sine wave of 15KHz frequency
with 32mV amplitude. The current mirror converts the differential output to a single ended
output. Finally the output buffer amplifies the signal to obtain the output audio signal with
amplitude of 0.5V output swing and provide certain deemphasis when needed.
At the end, the demodulator design and the output stage were successfully designed
and the layout for the whole design is done by using Cadence Virtuoso.
DESIGN OF DEMODULATOR FOR FM RECEIVER IC USING 0.18μm CMOS_Ng Keng Yoke_E3_2007_875002898_NI