Tesis ini mempersembahkan topologi suatu penukar buck baru. Topologi ini direka dan diimplementasikan bersama satu penukar buck konvensional. Kedua-dua topologi dianalisa untuk mendapatkan ekspresi matematik yang menjelaskan tingkah laku mereka. Ini diikuti oleh rekaan parameter, di mana frekuensi, kitar tugas dan ukuran komponen ditentukan. Dengan parameter-parameter yang ditentukan, litar-litar tersebut disimulasikan menggunakan Orcad Pspice Family Release 9.2. Simulasi juga berguna untuk lebih memahami tingkah laku penukar buck baru relative kepada penukar buck konvensional. Dilengkapi dengan pengetahuan tentang tingkah laku litat-litar, kedua-dua litar diimplementasikan pada PCB untuk tujuan eksperimen. Pensuisan keras litar-litar dijalankan oleh get isyarat PWM yang disalurkan kepada IGBT. Dioperasikan pada voltan masukan 60V pada kitar tugas yang berlainan (0.3, 0.5 dan 0.7), data dan rajah gelombang diambil untuk muatan tetap 50 ohm. Data yang diambil termasuk voltan dan arus input output, tekanan voltan kapasitor dan diod serta penurunan voltan pada induktor. Rajah gelombang yang diambil termasuk arus input, arus induktor dan kapasitor serta riak voltan keluaran. Hasil dapatan dianalisa untuk menentukan sama ada tingkah laku penukar buck baru sama seperti yang dijangkakan daripada analisis awal. Kedua-dua litar juga dibandingkan dari segi kecekapan dan tekanan voltan kapasitor. Berdasarkan hasil dari simulasi dan eksperimen, didapati bahawa tingkah laku kedua-dua litar adalah hampir sama. Penukar buck baru yang dibangunkan mempunyai kecekapan maksimum 89.2% pada 0.7 kitar tugas.
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This thesis presents a novel buck converter topology. This novel topology was designed and implemented alongside a conventional buck converter. Both topologies were analyzed to obtain mathematical expressions which helped explained their behavior. This was followed by design of the circuits’ parameters, where the frequency, duty cycle and components’ ratings were decided. Using the parameters which were determined, the circuits were simulated using Orcad Pspice Family Release 9.2. The simulations were also used to help further the understanding of the novel buck converter’s behavior relative to the conventional buck converter. With the knowledge of the circuits’ behaviors, both the circuits were implemented on PCB for experimentation. The circuits’ hard-switching were done by PWM gating signals fed into an IGBT. Operated under an input voltage of 60V at various duty cycles (0.3, 0.5 and 0.7), data and waveforms of the operating circuits were gathered for a fixed load of 50 ohms. Data of the circuits included input and output voltages and currents, capacitor and diode voltage stresses as well as inductor voltage drop. Waveforms which were obtained were input current, output voltage ripple, inductor current and capacitor current ripple. The results were analyzed to determine if the novel converter had performed according to analysis. Both circuits were also compared in terms of efficiency and capacitor voltage stress. Based on the results from simulation and experiment, it was found that both converters were similar in terms of circuit behavior and performance. The novel buck converter which was developed had a maximum efficiency of 89.2% for 0.7 duty cycle.
Design and implementation of a novel buck converter / Christopher Chua Kim Loong