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Rekabentuk penerima uart berasaskan fpga / Md Firdaus Razak

Rekabentuk penerima uart berasaskan fpga_Md Firdaus Razak_E3_2007_NI
The purpose of this project is to develop a UART receiver using FPGA. The project consist of two main parts; i.e. developing the receiver’s software and hardware implementation. The most important part is the software development. It involves the development of the receiver using Xilinx Foundation 2.1i software which is based on VHDL language. In this project, the Behavioral Modeling has been chosen. This receiver emulates the UART receiver which accepts 8 bit serial data and converts to 8 bit parallel data for communication in computer system. The hardware implementation involves the connection of Xilinx XC4010PC84 demo board with a computer via RS232 cable and the other hardware connection. The Xilinx XC4010PC84 demo board acts as receiver and displays the data from the computer which is sent in ASCII characters by LEDs in binary.
Contributor(s):
Md Firdaus Razak - Author
Primary Item Type:
Final Year Project
Language:
English
Subject Keywords:
Behavioral Modeling; UART; Xilinx Foundation
First presented to the public:
3/1/2007
Original Publication Date:
9/7/2018
Previously Published By:
Universiti Sains Malaysia
Place Of Publication:
School of Electrical & Electronic Engineering
Citation:
Extents:
Number of Pages - 64
License Grantor / Date Granted:
  / ( View License )
Date Deposited
2018-09-07 09:50:23.477
Date Last Updated
2019-01-07 11:24:32.9118
Submitter:
Nor Hayati Ismail

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