(For USM Staff/Student Only)

EngLib USM > Ω School of Electrical & Electronic Engineering >

Link system design and simulation with bit error rate / Yeoh Yong Huei Koon

Link system design and simulation with bit error rate_Yeoh Yong Huei Koon_E3_2007_NI_875002294
Satu sistem pemancar dan menerima termasuk sistem penukar naik/turun (up/down conversion system) telah direkabentuk dan disukat untuk mendapat Bit Error Rate (BER) bagi sistem tersebut. Sistem pemancar direkabentuk pada frekuensi bernilai 2.4 GHz. Sistem penerima superheterodyne direkabentuk untuk menerima frekuensi 2.4 GHz dari sistem penghantar dan disimulasi menggunakan Advanced Design System (ADS). Perkakas simulasi harmonic Balance digunakan untuk mendapat nilai gandaan dan angkar hingar bagi sistem tersebut. Selepas itu, litar tersebut akan difabrikasikan dengan menggunakan papan litar bercetak (PCB) jenis FR4. Papan litar bercetak tersebut kemudian disambung dengan sistem penghantar untuk menyukat BER bagi sistem pemancar dan penerima tesebut. Penjana isyarat (signal generator) digunakan sebagai pemancar untuk menghantar isyarat ke penerima. Isyarat yang dikeluarkan daripada penerima akan dibandingkan dengan isyarat pemancar dengan menyambungkan kedua-dua isyarat tersebut ke osiloskop. Data daripada osiloskop akan disimpan untuk mengira BER bagi sistem tersebut dengan menggunakan Microsoft Excel. BER disukat dengan mengubah kuasa bagi pemancar dan kuasa bagi pengayun (local oscillator). Kuasa minimum yang melebihi kuasa hingar akan dikenalpasti. _________________________________________________________________________________________ A transmit and receive system including up/down conversion system is designed in order to measure the Bit Error Rate (BER) of the system. The transmitter (up-converter) is designed at the radio frequency (RF) 2.4GHz. The front-end superheterodyne receiver (downconverter) is designed to accept the radio frequency from the transmitter and simulated in Advanced Design System (ADS). Harmonic Balance Simulation is performed to the system to obtain the conversion loss of the system, the minimum value of noise figure (NF), and the maximum values of gain. The down-converter is then fabricated on the FR4 type printed circuit board (PCB) for hardware testing and measurement for BER. The signal generator is used as a transmitter to transmit the signal to the receiver. The results of received signal are compare to transmit signal by connected it to the oscilloscope to view the waveforms. The waveforms data are saved for BER calculation at Microsoft Excel. The BER is measured by varies the power of the transmitter and the power of the local oscillator (LO). The minimum power levels that are just above the noise level are investigated.
Contributor(s):
Yeoh Yong Huei Koon - Author
Primary Item Type:
Final Year Project
Language:
English
Subject Keywords:
Bit Error Rate (BER); superheterodyne receiver; Harmonic Balance Simulation
First presented to the public:
3/1/2007
Original Publication Date:
9/7/2018
Previously Published By:
Universiti Sains Malaysia
Place Of Publication:
School of Electrical & Electronic Engineering
Citation:
Extents:
Number of Pages - 100
License Grantor / Date Granted:
  / ( View License )
Date Deposited
2018-09-07 12:00:32.151
Date Last Updated
2019-01-07 11:24:32.9118
Submitter:
Nor Hayati Ismail

All Versions

Thumbnail Name Version Created Date
Link system design and simulation with bit error rate / Yeoh Yong Huei Koon1 2018-09-07 12:00:32.151