Nowadays, as the demand for wireless communication continues to expand, the need for
RFIC (Radio frequency Integrated Circuits) has become more important. Spiral
inductors for RFIC circuits are critical for filtering and tuning purpose. However, a
model which can model the substrate loss, skin-effect loss, and underpass leakage (due
to via resistance) accurately either in low frequency or high frequency operation still
does not exist. Thus, the inductor with maximum quality factor (Q) at the desired
operating frequency and in the desired inductance value (L) is the current design trend.
In this project, the on-chip octagonal center-tapped inductors (CTI) are designed using
Silterra 0.18μm CMOS technology based on simulation approach. Two 1nH square
CTIs are created in ASITIC with Q 5.76 and 6.36, respectively. They are simulated in
ASITIC based on 2-port analysis and compared with the 2-port simulation results using
IE3D, which results in Q 6.34 and 7.67, respectively. The square CTIs are edited into
octagonal CTIs using Cadence VLE and simulated in IE3D based on 3-port analysis.
The Q of the first square CTI which obtained from 3-port analysis is 6.49 while the Q of
the first octagonal CTI, L1 is 6.75, increases approximately 4%. The Q of the second
square CTI which obtained from 3-port analysis is 7.77 while the Q of the second
octagonal CTI, L2 is 7.88, increases approximately 1.4%. Both 1nH octagonal CTIs are
compared with the single-ended octagonal inductors with the same dimension. The Q of
the CTI, L1 is 62.5% higher than the Q of single-ended inductor (4.15), while its L
(1.02nH) is 59.6% higher than the L of single-ended inductor (0.64nH). The Q of the
CTI, L2 is 45.5% higher than the Q of single-ended inductor (5.42), while its L (0.99nH)
is 13.4% higher than the L of single-ended inductor (0.88nH). The dependencies of L
and Q for the octagonal CTI on the variation of metal width (W), spacing (S), and
number of turns (N) at low frequencies range and higher frequencies range are analyze.
Physical models for both 1nH octagonal CTIs are created based on the simulation
results. The substrate losses of the octagonal CTI are modeled by the RSub and CSub in
the physical model.
PEMODELAN INDUKTOR TAP TENGAH BERDASARKAN TEKNOLOGI 0.18μm CMOS SILTERRA_Loo Wai Kit_E3_2007_875000091_NI