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Investigate instability behaviour in high power ldmos power amplifier / Ida Idyuni Ab Rahman

Investigate instability behaviour in high power ldmos power amplifier_Ida Idyuni Ab Rahman_E3_2005_NI
Dalam tesis ini, model penguat kuasa menggunakan transistor LDMOS dikaji menggunakan perisian ‘Advanced Design System’ versi terbaru 2004A keluaran ‘Agilent Technologies’. Kajian adalah meliputi kemampuan model tersebut beroperasi kurang daripada 1 GHz. Terdapat dua model penguat kuasa yang dikaji sepanjang projek ini dijalankan. Model-model tersebut terdiri daripada RD01MUS1 dan RD07MVS1 keluaran Mitsubishi yang diekstrak daripada transistor LDMOS transistor yang berukuran 59 mil pada PCB board jenis FR4. Hasil simulasi bagi kedua-dua model tersebut menunjukkan bahawa rekabentuk rangkaian kesepadanan untuk masukan dan keluaran adalah tidak efisien jika menggunakan nilai ‘Unilateral’ yang diaplikasi dengan cara Pemadanan Konjugat. Walaubagaimanapun, terdapat dua lagi aplikasi kesepadanan yang boleh digunakan tetapi tidak sempat dicuba oleh pengkaji kerana masalah kesuntukan masa iaitu aplikasi Pemadanan Talian Beban (Load Line Matching) dan Analisis Talian Beban (Load Pull Analysis) Dengan itu, adalah penting untuk menghasilkan transistor yang mampu untuk beroperasi dengan kecekapan yang tinggi semasa proses pembuatan lagi untuk menjimatkan masa dan kos untuk menyelesaikan masalah ketidakstabilan di bawah keadaan tidaksepadanan transistor LDMOS. Kesimpulan mengenai kemampuan transistor LDMOS tidak boleh dibuat hanya berdasarkan keputusan simulasi kerana keputusan simulasi tidak semestinya bertepatan dengan keputusan pengukuran yang menggunakan alatan sebenar. Langkah seterusnya sepatutnya difokuskan untuk memeperbaiki model dan kajian lanjutan perlu diteruskan terhadap kebolehan LDMOS untuk beroperasi dengan kecekapan optimum pada julat frekuensi lebih dripada 1 GHz. _________________________________________________________________________________________ In this thesis the models of LDMOS power amplifier was been investigated using Advanced Design System (ADS) version 2004A software from Agilent Technologies for operation below 1 GHz frequency range. There are two models considered in this project. Both of the models were provided by Motorola. The two models are RD01MUS1 and RD07MVS1 based on a 59 mil LDMOS transistor using type of FR4 PCB Board. Large-signal simulations of both models have demonstrated results, which lead to the conclusion that, these models cannot be efficiently utilised for design of input and output matching networks using Unilateral value for Conjugate Matching. However, there are other matching applications; Load Line Matching and Load Pull Analysis that can be used that have not been explored yet by the researcher due to time constraint. Hence, it is important to take into account during new processes of LDMOS as well as to improve the CAD model. The final conclusion regarding LDMOS cannot be made just based on these simulation results, since they are not in accordance with the published ones. The next step should be aimed at improving the model and further investigation of LDMOS to prove their ability to operate with optimum efficiency in above1 GHz frequency range.
Contributor(s):
Ida Idyuni Ab Rahman - Author
Primary Item Type:
Final Year Project
Language:
English
Subject Keywords:
power amplifier; Load Line Matching and Load Pull Analysis; signal simulations
First presented to the public:
3/1/2005
Original Publication Date:
8/13/2018
Previously Published By:
Universiti Sains Malaysia
Place Of Publication:
School of Electrical & Electronic Engineering
Citation:
Extents:
Number of Pages - 93
License Grantor / Date Granted:
  / ( View License )
Date Deposited
2018-08-13 10:56:46.568
Date Last Updated
2019-01-07 11:24:32.9118
Submitter:
Nor Hayati Ismail

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Investigate instability behaviour in high power ldmos power amplifier / Ida Idyuni Ab Rahman1 2018-08-13 10:56:46.568