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Implementation of a digital clock using vhdl / Siti Hajar binti Mat Lazim

IMPLEMENTATION OF A DIGITAL CLOCK USING VHDL_Siti Hajar Binti Mat Lazim_E3_2007_875000203_NI
This project implements a digital clock using VHDL. The implementation is simulated and verified on MAX+PLUS II software. In doing so, a number of lesson learned are described.
Contributor(s):
Siti Hajar Mat Lazim - Author
Primary Item Type:
Final Year Project
Identifiers:
Accession Number : 875000203
Language:
English
Subject Keywords:
digital clock using VHDL; simulated; mplementation
First presented to the public:
5/1/2007
Original Publication Date:
1/22/2018
Previously Published By:
Universiti Sains Malaysia
Place Of Publication:
School of Electrical & Electronic Engineering
Citation:
Extents:
Number of Pages - 87
License Grantor / Date Granted:
  / ( View License )
Date Deposited
2018-01-22 10:42:40.405
Date Last Updated
2019-01-31 12:34:20.697
Submitter:
Nor Hayati Ismail

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Implementation of a digital clock using vhdl / Siti Hajar binti Mat Lazim1 2018-01-22 10:42:40.405
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